Analysis of Bending and Shearing of Tri-Layer Laminations for Solder Joint Reliability

Author:

Buratynski E. K.1

Affiliation:

1. Bell Laboratories, Lucent Technologies, P. O. Box 900, Princeton N.J. 08542

Abstract

For solder joint reliability reasons, direct chip attach technology uses an underfill material to restrict the movement of the silicon die relative to the substrate due to differences in their coefficients of thermal expansion. Modeling the fatigue life of a solder joint assembled with this technology requires a shear strain versus applied shear stress relationship. The direct chip attach configuration can be modeled as a tri-layer lamination that bends and shears with temperature excursions from the stress-free temperature. The present analysis formulates an axisymmetric, tri-layer, elastic material stress model with finite radii for the silicon die and underfill layer and an infinite sized substrate layer. A closed form solution to the shear distributions at the interfaces and the bending of the lamination is presented. This solution is a function of the reactant forces exerted by solder joints and forms the basis of a fatigue life model.

Publisher

ASME International

Subject

Electrical and Electronic Engineering,Computer Science Applications,Mechanics of Materials,Electronic, Optical and Magnetic Materials

Reference16 articles.

1. Clech, J.-P. M., 1996, “Solder Reliability Solutions: From LCCCs to Area-Array Assemblies,” Proc. Nepcon West ’96, Reed Exhibition Co., Norwalk, CT, pp. 1665–1680.

2. Clech, J.-P. M., and Augis, J. A., 1988, “Temperature Cycling, Structural Response and Attachment Reliability of Surface-Mounted Leaded Packages,” Proc. Int. Electronic Packaging Conf., Int. Elec. Packaging Soc., Inc., Wheaton, IL, pp. 305–325.

3. Clech, J.-P. M., and Augis, J. A., 1991, “Surface Mount Attachment Reliability and Figures of Merit for Design for Reliability,” chap. 18 in Solder Joint Reliability, J. Lau, ed., Van Nostrand Reinhold, NY.

4. Clech J.-P. , ManockJ. C., NoctorD. M., BaderF. E., and AugisJ. A., 1993, “A Comprehensive Surface Mount Reliability Model Covering Several Generations of Packaging and Assembly Technology,” IEEE Trans. Camp., Hybrids, Manuf. Technol., Vol. 16, No. 8, pp. 949–960.

5. Erratum, 1991, ASME JOURNAL OF ELECTRONIC PACKAGING, Vol. 113, p. 26.

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