Room-temperature DC-sputtered p-type CuO accumulation-mode thin-film transistors gated by HfO2

Abstract

CuO grown by room-temperature direct current reactive magnetron sputtering is introduced to realize p-type thin-film transistors (TFTs) with a high-k HfO2 gate dielectric fabricated by atomic layer deposition. The devices work in an accumulation mode (AM) with two apparent threshold voltages corresponding to the formation of a buried channel and an accumulation layer, respectively. A CuO AM TFT with a channel length of 25  μm exhibit a competitive on-off ratio ( Ion/Ioff) of 1.3 × 102, a subthreshold swing ( SS) of 1.04 V dec−1, and a field-effect mobility ( μFE) of 1.1 × 10−3 cm2 V−1 s−1 at room temperature. By measuring a CuO metal oxide semiconductor (MOS) capacitor at room temperature, a high acceptor doping density ( NA) of ∼5 × 1017 cm−3, a high positive effective fixed surface charge density ( Qf) of ∼9 × 1012 cm−2, and a low interfacial trap charge density ( Dit) of ∼6 × 1010 eV−1 cm−2 at the HfO2/CuO interface are estimated. The μFE extracted from the accumulation regime appears lower than the Hall mobility measured for a similarly processed CuO layer on glass due to the increased hole concentration in CuO TFTs, compared to a Hall concentration of ∼1014 cm−3, following the MOS process. SS appears limited by the decreased channel to gate capacitance ( Ccg) related to the buried channel in AM TFTs, parasitic capacitance to ground, and potentially very high interfacial traps at the non-passivated CuO/air interface.