Enhanced Boiling of FC-72 on Silicon Chips With Micro-Pin-Fins and Submicron-Scale Roughness

Author:

Honda H.1,Takamastu H.1,Wei J. J.2

Affiliation:

1. Institute of Advanced Material Study, Kyushu University, Kasuga, Fukuoka 816-8580, Japan

2. Interdisciplinary Graduate School of Engineering Sciences, Kyushu University, Kasuga, Fukuoka 816-8580, Japan

Abstract

Experiments were conducted to study the effects of micro-pin-fins and submicron-scale roughness on the boiling heat transfer from a silicon chip immersed in a pool of degassed and gas-dissolved FC-72. Square pin-fins with fin dimensions of 50×50×60μm3 (width×thickness×height) and submicron-scale roughness (RMS roughness of 25 to 32 nm) were fabricated on the surface of square silicon chip 10×10×0.5mm3 by use of microelectronic fabrication techniques. Experiments were conducted at the liquid subcoolings of 0, 3, 25, and 45 K. Both the micro-pin-finned chip and the chip with submicron-scale roughness showed a considerable heat transfer enhancement as compared to a smooth chip in the nucleate boiling region. The chip with submicron-scale roughness showed a higher heat transfer performance than the micro-pin-finned chip in the low-heat-flux region. The micro-pin-finned chip showed a steep increase in the heat flux with increasing wall superheat. This chip showed a higher heat transfer performance than the chip with submicron-scale roughness in the high-heat-flux region. The micro-pin-finned chip with submicron-scale roughness on it showed the highest heat transfer performance in the high-heat-flux region. While the wall superheat at boiling incipience was strongly dependent on the dissolved gas content, it was little affected by the liquid subcooling.

Publisher

ASME International

Subject

Mechanical Engineering,Mechanics of Materials,Condensed Matter Physics,General Materials Science

Reference18 articles.

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2. You, S. M., Simon, T. W., Bar-Cohen, A., and Tong, W., 1990, “Experimental Investigation of Nucleate Boiling Incipience With a Highly Wetting Dielectric Fluid (R-113),” Int. J. Heat Mass Transf., 33, pp. 105–117.

3. Oktay, S., and Schmeckenbecher, A., 1972, “Method for Forming Heat Sinks on Semiconductor Device Chips,” U.S. Patent No. 3,706,127.

4. Chu, R. C., and Moran, K. P., 1977, “Method for Customizing Nucleate Boiling Heat Transfer from Electronic Units Immersed in Dielectric Coolant,” U.S. Patent No. 4,650,507.

5. Nakayama, W., Nakajima, T., and Hirasawa, S., 1984, “Heat Sink Studs Having Enhanced Boiling Surfaces for Cooling Microelectronic Components,” ASME Paper No. 84-WA/HT-89.

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