13.5 A 512Gb 3-bit/Cell 3D Flash Memory on 128-Wordline-Layer with 132MB/s Write Performance Featuring Circuit-Under-Array Technology-Reference-Cited by-同舟云学术

13.5 A 512Gb 3-bit/Cell 3D Flash Memory on 128-Wordline-Layer with 132MB/s Write Performance Featuring Circuit-Under-Array Technology

Published:2019-02 Issue: Volume: Page:
ISSN:
Container-title:2019 IEEE International Solid- State Circuits Conference - (ISSCC)
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Author:

Siau Chang,Kim Kwang-Ho,Lee Seungpil,Isobe Katsuaki,Shibata Noboru,Verma Kapil,Ariki Takuya,Li Jason,Yuh Jong,Amarnath Anirudh,Nguyen Qui,Kwon Ohwon,Jeong Stanley,Li Heguang,Hsu Hua-Ling,Tseng Tai-yuan,Choi Steve,Darne Siddhesh,Anantula Pradeep,Yap Alex,Chibvongodze Hardwell,Miwa Hitoshi,Yamashita Minoru,Watanabe Mitsuyuki,Hayashi Koichiro,Kato Yosuke,Miwa Toru,Kang Jang Yong,Okumura Masatoshi,Ookuma Naoki,Balaga Muralikrishna,Ramachandra Venky,Matsuda Aki,Kulkani Swaroop,Rachineni Raghavendra,Manjunath Pai K.,Takehara Masahito,Pai Anil,Rajendra Srinivas,Hisada Toshiki,Fukuda Ryo,Tokiwa Naoya,Kawaguchi Kazuaki,Yamaoka Masashi,Komai Hiromitsu,Minamoto Takatoshi,Unno Masaki,Ozawa Susumu,Nakamura Hiroshi,Hishida Tomoo,Kajitani Yasuyuki,Lin Lei

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/8656625/8662285/08662445.pdf?arnumber=8662445

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