FPGA implementation of a Spiking Neural Network for Real-Time Action Potential and Burst Detection
Author:
Affiliation:
1. University of Bordeaux,IMS Laboratory, CNRS UMR5218,Talence,France
2. Université Grenoble-Alpes,BrainTech Laboratory, INSERM U1205,Saint-Martin-d’Hères,France,38400
3. The University of Tokyo,LIMMS/CNRS-IIS, UMI 2820,Tokyo,Japan
Funder
Agence Nationale de la Recherche
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10388488/10388438/10388622.pdf?arnumber=10388622
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