Enhanced electrical performance in graphene field-effect transistors through post-annealing of high-k HfLaO gate dielectrics

Abstract

High-k gate dielectrics have attracted a great deal of attention in the investigation of transistors due to their unique properties such as superior gate controllability. However, their integration into graphene field-effect transistors (GFETs) remains problematic and the physical mechanisms governing the performance of these devices are still not fully understood. In this study, the effects of post-annealing on GFETs utilizing the high-k HfLaO ternary oxide as the gate dielectric were comprehensively investigated. The HfLaO film was deposited on top of graphene by magnetron sputtering, and the device performance with various post-annealing temperatures was conducted. It was found that post-annealing temperature can effectively increase the dielectric constant through balancing the oxygen-vacancy defects and moisture absorption. Both the surface morphology of HfLaO and performance of GFETs were investigated, and the fabricated GFETs exhibit notable electrical performance enhancements. Specifically, GFETs with a 200 °C post-annealed HfLaO gate dielectric demonstrate the optimal device performance, featuring a minimal Dirac point voltage (VDirac) of 1.1 V and a minimal hysteresis (ΔVDirac) of 0.5 V. The extracted hole and electron mobilities are 4012 and 1366 cm2/V · s, respectively, nearly one order of magnitude higher than that of GFETs with as-deposited HfLaO. This work outperforms other existing GFETs utilizing high-k gate dielectric and chemical vapor deposition grown graphene in terms of both carrier mobility and on–off ratio. It is also noted that the excessive post-annealing temperature can negatively impact the GFET performance through introducing oxygen vacancies, increasing the surface roughness, lowering the breakdown voltage, and inducing recrystallization.