Micro‐Patterning Wettability in Very Large Scale Microfluidic Integrated Chips for Double Emulsion Generation

Abstract

AbstractThe fabrication of microfluidic chips is becoming a mature field and channels can be reliably defined with micrometer‐scale precision in a variety of substrates. In addition to channel geometry, micrometer‐scale patterning of wettability in microfluidic channels is essential for many applications including multi‐phase flow stabilization and multiple emulsion generation. Unfortunately, current methods to pattern wettability in microfluidics suffer from low spatial resolution, inability for patterns to be arbitrarily defined, cumbersome procedures, and incompatibility with parallelized architectures for scaled‐up production of microfluidic generated materials. To address these issues, a method is developed to lithographically define micrometer‐scale resolution patterns of wettability on all channel surfaces (ceiling, floor, and walls) in silicon and glass microfluidic devices with complex 3D geometry. A process is reported to pattern silanes on microfluidic chips that uses photolithography and an optimized process that keeps silanized surfaces stable through the microfabrication process, including anodic bonding. The versatility of this approach is highlighted by patterning wettability of a silicon/glass device to generate both highly uniform water–in‐oil–in‐water and oil–in‐water–in‐oil double emulsions. The applicability of this process is demonstrated to the parallel generation of materials in a microfluidic chip with complex geometry, by fabricating and successfully validating parallelized double emulsion generators.