47‐1: Invited Paper: A 6Gbps Intra‐Panel Interface with Video Image Compression for Next Generation Displays

Author:

Jang Won-Ho1,Ryu Kyungho1,Lim Jung-Pil1,Jung Jicheol1,Han Junho1,Han Mangi1,Kwon Yongil1,Lim Hyun-Wook1,Lee Jae-Youl1

Affiliation:

1. System LSI Division, Samsung Electronics Co. Ltd. Hwa-sung City Korea

Abstract

This paper proposes a 6Gbps receiver for 8K 240Hz OLED display. In the proposed receiver, video image compression is presented to double the effective data bandwidth. In addition, it proposes dual path CTLE offset voltage calibration and CTLE adaptation with eye margin tester to implement 6Gbps receiver. The prototype IC is implemented in a 0.18μm HVCMOS process and is evaluated as an 8K 65‐inch panel.

Publisher

Wiley

Reference7 articles.

1. Real-Time External Compensation System With Error Correction Algorithm for High-Resolution Mobile Displays

2. "A 6Gb/s 3-tap FFE transmitter and 5-tap DFE receiver in 65nm/0.18μm CMOS for next-generation 8K displays";Hekmat M.;ISSCC,2016

3. A clock embedded intra‐panel interface with 1.96% data overhead for beyond 8K displays

4. LCD-TV System with 2.8Gbps/Lane Intra-Panel Interface for 3D TV Applications;Kim J.;the Society for information display symposium digest,2012

5. A 100Gb/s 1.1pJ/b PAM-4 RX with Dual-Mode 1-Tap PAM-4 / 3-Tap NRZ Speculative DFE in 14nm CMOS FinFET;Cevrero A.;ISSCC,2019

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