Author:
Onaissi Sari,Taraporevala Feroze,Liu Jinfeng,Najm Farid
Cited by
6 articles.
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1. Accelerating Static Timing Analysis Using CPU–GPU Heterogeneous Parallelism;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2023-12
2. Design of CMOS Device Process Sensor in 28 nm FD-SOI with 2 % of Frequency Spread;2021 28th IEEE International Conference on Electronics, Circuits, and Systems (ICECS);2021-11-28
3. Power and Area Efficient Hold Time Fixing by Free Metal Segment Allocation;Proceedings of the 54th Annual Design Automation Conference 2017;2017-06-18
4. Efficient variability analysis of arithmetic units using linear regression techniques;Analog Integrated Circuits and Signal Processing;2016-03-22
5. A timing graph based approach to mode merging;Proceedings of the 52nd Annual Design Automation Conference;2015-06-07