Author:
Raghavan Venkatesh Arasanipalai,Roggeman Brian,Meilunas Michael,Borgesen Peter
Subject
Electrical and Electronic Engineering,Surfaces, Coatings and Films,Safety, Risk, Reliability and Quality,Condensed Matter Physics,Atomic and Molecular Physics, and Optics,Electronic, Optical and Magnetic Materials
Reference30 articles.
1. Lee D. Printed circuit board consideration for lead free assembly. In: SMTA international conference, Chicago, IL; 2006. p. 556–62.
2. Reliability of CSP interconnections under mechanical shock loading conditions;Mattila;IEEE Trans Compon Pack Technol,2006
3. Farris A, Pan J, Liddicoat A, Toleno BJ, Maslyk D. Drop test reliability of lead-free chip scale packages. In: Electronics components and technology conference; 2008. p. 1173–80.
4. Newman K. Board-level solder joint reliability of high performance computers under mechanical loading. In: EuroSimE 2008, international conference on thermal, mechanical and multi-physics simulation and experiments in microelectronics and micro-systems. Freiburg im Breisgau, 20–23 April 2008. p. 1–15.
5. Vickers N, Rauen K, Farris A, Pan J. Board level failure analysis of chip scale package drop test assemblies. In: Proceedings of the 41st international symposium on microelectronics, Providence, RI, November 2008.
Cited by
7 articles.
订阅此论文施引文献
订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献