Impact of the channel doping on the low-frequency noise of gate-all-around silicon vertical nanowire pMOSFETs
Author:
Publisher
Elsevier BV
Subject
Materials Chemistry,Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials
Reference13 articles.
1. A. Veloso, G. Eneman, T. Huynh-Bao, A. Chasin, E. Simoen, E. Vecchio, K. Devriendt, S. Brus, E. Rosseel, A. Hikavyy, R. Loo, V. Paraschiv, B. T. Chan, D. Radisic, W. Li, J. J. Versluijs, L. Teugels, F. Sebaai, P. Favia, H. Bender, E. Vancoille, J. Scheerder, C. Fleischmann, N. Horiguchi, and P. Matagne, “Vertical nanowire and nanosheet FETs: device features, novel schemes for improved process control and enhanced mobility, potential for faster & more energy efficient circuits,” International Electron Devices Meeting, IEEE Xplore, pp. 230-233, Dec. 2019, https://doi.org/10.1109/IEDM19573.2019.8993602.
2. A. Veloso, G. Eneman, A. De Keersgieter, D. Jang, H. Mertens, P. Matagne, E. Dentoni Litta, J. Ryckaert and N. Horiguchi, “Nanosheet FETs and their potential for enabling continued Moore’s law scaling,” in Proc. of the 5th IEEE Electron Devices Technol. & Manufact. Conf. (EDTM), IEEE Xplore, p. 1, May 2021, https://doi.org/10.1109/EDTM50988.2021.9420942.
3. Diameter scaling of vertical Ge gate-all-around nanowire pMOSFETs;Liu;IEEE Trans Electron Devices,2020
4. E. Simoen, A. Veloso and P. Matagne, “On the asymmetry of the DC and low-frequency noise characteristics of vertical nanowire pMOSFETs with bulk source contact,” in: Proc. EUROSOI-ULIS 2021, IEEE Xplore, p. 1, Sep. 2021, https://doi.org/10.1109/EuroSOI-ULIS53016.2021.9560186.
5. Impact of processing factors on the low-frequency noise of gate-all-around silicon vertical nanowire FETs;Simoen;ECS Trans,2021
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