Double dielectrics enhancement on the LDMOS using high-k field dielectric and low-k buried dielectric
Author:
Publisher
Elsevier BV
Subject
General Physics and Astronomy
Reference20 articles.
1. A novel SOI LDMOS with substrate field plate and variable-k dielectric buried layer;Li;Results Phys,2018
2. Novel SiC/Si heterojunction LDMOS with electric field modulation effect by reversed L-shaped field plate;Li;Results Phys,2020
3. Reliability concerns on LDMOS with different split-STI layout patterns;Ye;IEEE Trans Electron Devices,2020
4. Performance analysis of a novel trench SOI LDMOS with centrosymmetric double vertical field plates;Lei;Results Phys,2019
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1. A novel double-gate trench SOI LDMOS with double-dielectric material by TCAD simulation study;Semiconductor Science and Technology;2024-05-20
2. Specific On-Resistance Reduction for the LDMOS Using Separated Composite Dielectric Trenches;IEEE Transactions on Electron Devices;2024-01
3. A Novel High Performance SOI LDMOS with Buried Stepped Gate Field Plate;Transactions on Electrical and Electronic Materials;2023-09-30
4. Study of ultra-low specific on-resistance and high breakdown voltage SOI LDMOS based on electron accumulation effect;Engineering Research Express;2023-08-29
5. SOI LDMOS With High-k Multi-Fingers to Modulate the Electric Field Distributions;IEEE Transactions on Electron Devices;2023-05
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