Author:
Aichernig Bernhard K.,Lorber Florian,Ničković Dejan
Publisher
Springer Berlin Heidelberg
Cited by
58 articles.
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1. Incremental and Formal Verification of SysML Models;SN Computer Science;2024-07-17
2. Time for Networks: Mutation Testing for Timed Automata Networks;Proceedings of the 2024 IEEE/ACM 12th International Conference on Formal Methods in Software Engineering (FormaliSE);2024-04-14
3. Mutation Testing for Temporal Alloy Models;2023 ACM/IEEE 26th International Conference on Model Driven Engineering Languages and Systems (MODELS);2023-10-01
4. Mutant Equivalence as Monotonicity in Parametric Timed Games;2023 IEEE/ACM 11th International Conference on Formal Methods in Software Engineering (FormaliSE);2023-05
5. Test Generation and Mutation Analysis of Energy Consumption using UPPAAL SMC and MATS;2023 IEEE International Conference on Software Testing, Verification and Validation Workshops (ICSTW);2023-04