Accelerating SLH-DSA by Two Orders of Magnitude with a Single Hash Unit
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Publisher
Springer Nature Switzerland
Link
https://link.springer.com/content/pdf/10.1007/978-3-031-68376-3_9
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2. Amiet, D., Curiger, A., Zbinden, P.: FPGA-based accelerator for post-quantum signature scheme SPHINCS-256. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2018(1), 18–39 (2018). https://doi.org/10.13154/TCHES.V2018.I1.18-39
3. Amiet, D., Leuenberger, L., Curiger, A., Zbinden, P.: FPGA-based $$\text{SPHINCS}^{\text{+ }}$$ implementations: mind the glitch. In: 23rd Euromicro Conference on Digital System Design, DSD 2020, Kranj, Slovenia, August 26–28, 2020, pp. 229–237. IEEE (2020). https://doi.org/10.1109/DSD51259.2020.00046
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